There was no live stream, and CEO Lei Jun did not make an appearance. Yet Xiaomi needed just 40 minutes to unveil three chips.
On August 24, Xiaomi launched three Xring chips at once: the flagship Xring O3 system-on-chip (SoC), the Xring O100 artificial intelligence accelerator, and the high-compute Xring D100 AI chip for smart driving.
In recent years, smartphone makers developing chips in-house have typically focused on specialized functions such as imaging, communications, and power management. But as large AI models move into smartphones, cars, and robots, on-device AI capabilities are becoming a more important focus of chip investment.
AI models are also growing larger. Delivering more computing power while overcoming memory-related constraints has become a central challenge for the next generation of AI chip design.
The Xring O3 is Xiaomi’s second flagship SoC developed in-house. It retains a 3-nanometer process, while its transistor count has increased to 24 billion from 19 billion in the previous generation.
One notable change is the O3’s greater emphasis on AI computing. In addition to a neural processing unit (NPU) dedicated to AI tasks, Xiaomi has added acceleration units across several major chip modules to handle AI workloads of different sizes.
The design is intended to reduce the efficiency losses and excess power consumption that can result when lightweight AI tasks repeatedly call on the NPU.
According to details disclosed at the launch, the Xring O3 will debut in September with the Xiaomi 18 Fold.
Compared with the O3, the Xring O100 more directly reflects changes in AI chip design. In recent years, computing performance has been one of the most commonly cited measures of chip competitiveness. But as the parameter counts of large models increase, computing power is no longer the only constraint on how quickly those models can run.
Compute units are becoming more powerful, but they must constantly retrieve model parameters and intermediate data from memory. If data transfer speeds cannot keep pace, the compute units are left waiting. The result is a growing imbalance in AI chips: computing capacity continues to rise, while memory bandwidth and data transfer capacity are emerging as key bottlenecks.
Apple, Huawei, and Xiaomi have each pursued architectural approaches aimed at addressing the problem.
Apple has increased the capacity and bandwidth of its unified memory architecture, which allows the CPU, GPU, and its Neural Engine to access shared memory. Huawei has also expanded high-bandwidth memory capabilities in its AI chips.
Xiaomi’s Xring O100 AI accelerator uses a near-memory computing architecture designed for on-device AI. The design vertically stacks compute and memory units, or places them physically closer together, to reduce the latency caused by moving data between them.
The chip uses 3D wafer-on-wafer stacking. Through hybrid bonding technology, two DRAM wafers and one NPU compute wafer are bonded together.
The Xring O100 offers memory bandwidth of 1.22 terabytes per second and integrates a 14-core NPU designed for large AI models. Xiaomi said ultra-dense interconnects between its compute and memory units enable on-device large-model inference at speeds of up to 330 tokens per second.
At the launch, Xiaomi demonstrated prototype devices equipped with the Xring O100 and Xring O3. Running offline on Xiaomi’s MiMo large model, the devices generated output with little apparent delay during the demonstration.
As more AI tasks are performed directly on devices, hardware such as smartphones, PCs, and cars faces growing demands for real-time performance, privacy, and offline functionality.
The day after Xiaomi’s chip launch, Apple also introduced its next-generation M6 and M5 Ultra chips. The M6 uses a 2-nm process and is designed for office work, software development, content creation, and on-device AI tasks. The M5 Ultra, meanwhile, uses a new multi-chip packaging architecture intended to improve performance, memory capacity, and local AI capabilities.
For its automotive business, Xiaomi also launched the Xring D100, an in-house 3-nm AI chip designed for intelligent driving. It contains a 20-core CPU and a 16-core NPU. According to Xiaomi, a single chip supports up to 160 gigabytes of memory and can run models with more than 200 billion parameters locally.
The Xring D100 also supports multi-chip computing. Xiaomi said the chip can provide local AI computing capacity for complex workloads and can also be used in vehicles to run intelligent-driving algorithms.
The latest release marks Xiaomi’s biggest chip push since it began developing semiconductors in-house in 2016.
Xiaomi initially shifted toward smaller, specialized chips before restarting development of a flagship SoC in 2021. In 2025, it launched its first Xring flagship chip, the Xring O1. One year later, it has introduced three more chips across smartphones, AI computing, and automotive applications.
Xiaomi has reportedly invested more than RMB 18 billion (USD 2.7 billion) in chip development over the past five years and allocated a total budget of RMB 50 billion (USD 7.4 billion). Its chip R&D team currently has more than 3,000 employees.
As on-device AI adoption accelerates, chips will become an increasingly important foundation for Xiaomi’s smartphone, automotive, and robotics businesses. The company has said its in-house chip strategy will therefore focus on on-device AI inference.
KrASIA features translated and adapted content that was originally published by 36Kr. This article was written by Xiao Man for 36Kr.
Note: RMB figures are converted to USD at rates of RMB 6.74 = USD 1 based on estimates as of August 31, 2026, unless otherwise stated. USD conversions are presented for ease of reference and may not fully match prevailing exchange rates.